A typical field programmable logic array is fabricated as an array of rows and columns of logic modules each of which is designed to perform a number of basic logic operations. Each logic module includes an output coupled to an associated output conductor and a number of inputs each coupled to an associated input conductor. The input and output conductors for the logic modules in the array are usually disposed in parallel on the face of the array in a specified direction, for example in parallel with the columns. Routing lines/tracks are then run perpendicular to the input and output conductors, typically in groups or "channels" parallel with the rows of logic modules. Fuses, which can be electrically programmed into low resistance states ("blown"), are fabricated at the intersections of the input and output conductors and the perpendicular routing lines. The output of one logic module can then be coupled to an input of another module by shorting the corresponding output conductor to a selected routing line by blowing the fuse at the output conductor/routing line intersection and then shorting the corresponding input conductor to the same routing line by blowing the fuse at the input conductor/routing line intersection.
One of the significant obstacles to building fast, low power field programmable gate arrays is the high capacitance of this interconnect scheme, especially the capacitance on the module outputs. The capacitance seen by the output of a particular logic module has two primary sources. The first source of capacitance comes from the capacitances of the "unblown" fuses located at intersections where the associated output conductor crosses a routing line to which no connection is being made (the "blown" fuses are primarily resistive and usually have a negligible capacitance in comparison). For example, if an output line runs across six channels each having 30 routing conductors and if an fuse is fabricated at each intersection, the output of the associated logic module will see the capacitance created by approximately 180 fuses, since typically the number of "blown" fuses along a given output line is small in comparison to the number of "unblown" fuses. The second substantial source of capacitance on a module output comes from unblown fuses along any routing lines coupled to the output line through a blown fuse. For example, if the associated output line is shorted by a blown fuse to a routing line having a number of unblown fuses along its length (where the routing line intersects other input and output lines) those unblown fuses will also add to the capacitance seen at the module output.
Another substantial obstacle to the fabrication of an efficient field programmable logic array comes from the isolation devices used to protect the inputs and outputs of the logic modules from the relatively high voltages applied to blow the fuses along the associated conductors during programming. These isolation devices normally are connected in series between the input or output port and the corresponding input/output conductor. The resistance of the isolation devices, in addition to the resistances of any "blown" fuses along the output conductors, increase the RC (resistance X capacitance) product, creating further signal delay.
Thus the need has arisen for improved programmable interconnection circuitry an methods which eliminate the significant disadvantages resulting from the capacitance and resistance problems inherent in presently available programmable logic arrays.